Intel x86 Evolution: From 8086 to 80386 - Essay Sample

Introduction

Intel x86 evolution started with microprocessor 8086 along with 8088 16-bit CPUs. Intel introduced 8088 because 8086 was expensive. The new 8088 architecture was capable and performed well for an individual user. The 8087 coprocessor was the first architecture produced for point computations. In 1982, Intel introduced 80296 characterized by additional memory functionality capable of improving memory capacity of the processor. The evolution of x86 family got a boost when 80386 was introduced offering room for 32bit processing. The 80486, introduced in 1989 allowed for improvement in memory hierarchy through the expansion of 386 execution units to five-stage pipeline structure. The 80586, also known as the Pentium was produced in 1993 completing development of x86 family. The evolution of the x86 family made improvements allowing the chip to perform different functions (Domas, np).

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ARM Architecture

The first ARM processor was recognized in 1983 known as ARM1. ARM1 used 24,800 transistors and had some problems hence could not function as expected. It did not have the ability to support coprocessors. The problems associated with ARM1 prompted the introduction of ARM2 design. Introduction of ARM2 made it possible for support of coprocessor with improved performance. It is worth noting that ARM2 performance was fast with a small processor. In 1989, ARM3 was introduced to the market. The good thing about ARM3 was that it allowed for the on-die cache. The improvements on the processor allowed for running of higher frequency while supporting cheap and slow DRAM chips. Evolution of ARM architecture got a boost when the company received a boost from apple. ARM3 improved its performance and power through the realization of a 486-class performance. ARM3 criticism prompted for development of ARM6 that allowed for the extension of the 26-bit address bus to 32-bit hence making it possible for large address base and space for backward compatibility mode (Goodacre, John, and Cambridge, np).

Internal Structures

Intel x86

The diagram above is a highlight of major internal parts of intel x86 functional blocks. ALU resisters located on the left side is made of 8bit arithmetic. The function of ALU is to carry out data computations. The reason why ALU registers occupy a large portion of the chip is that it requires large transistors for signals transmission. Carry circuitry is located just below the ALU registers. Its function is to make improvements in the computation of 8 carry values, therefore, allowing for performance. The triangular shape of ALU allows for the stack of processors. The function of ALU is to support eight operations. The center of the chip contains instruction structure and instruction decode. The work of instruction decode is to allow for decoding of logic required in the determination of instructions carried by the 8-bit machine. The right section of the chip is the storage blocks. The function of the storage blocks to store processed data (Roberts-Hoffman, Katie, and Hegde, np).

ARM Architecture

The diagram above is an internal design of ARM. ARM instructions function by allowing a set of 32-bit instruction set to be processed. The thumb remaps to ARM section of the processor adds new 16-bit instruction to the processor. It is at this point, where the processor gets to decide instructions to be decoded. It is at the thumb instruction where there is a subset of instructions. The details carried on the thumb set instructions are ready for decoding hence moved to ARM instruction decoder where the implementation of instruction takes place. The final section of the chip is the final execution stage, which allows for the output of processed information.

Comparison

Compare Intel x86 and ARM architectures in terms of design for performance features.

X86 Intel ARM Architecture

Its CPU is CISC that is complex instruction set computing. It, therefore, means that the CPU gets to express a single idea, but for performance to take place, it requires the CPU to execute four simple instructions. The CISC family allows intel X86 to perform a complex task and in large quantities. ARM CPU is RISC meaning it is of reduced instruction set computing. RISC processors decoding process is simple and carries less power hence efficiency. Simple instructions in processing have its importance in performance for both hardware and software. Simple instructions imply that it requires small chips; hence, it can perform in many different kinds of devices.

It is designed for high and super performance meant for use in desktops and computer servers. It consumes much power because of its ability to handle complex processes. It is estimated that high-end intel requires powers up to 130W to perform. Its design is made to allow for lower power usage. Lower power usage means that it can be used for mobile device use. They can perform without the requirement of heat sinks. It consumes less power of 5W for efficient performance.

64-bit computing is not well developed, and its project was never successful and relied on AMD64. ARM 64-bit computing relied on to already existing ARMv8, which had its principle and instruction set.

Its performance is best in running devices that are run in an operating system or any regular desktop It can perform mobile-based devices such as android (Montella, Raffaele, et al. p1142-1163).

Works Cited

Domas, Christopher. "Breaking the x86 ISA." Black Hat (2017).

Goodacre, John, and A. Cambridge. "The evolution of the ARM architecture towards big data and the data-center." VHPC@ SC. 2013.

Montella, Raffaele, et al. "On the Virtualization of CUDA Based GPU Remoting on ARM and X86 Machines in the GVirtuS Framework." International Journal of Parallel Programming, vol. 45, no. 5, 2017, pp. 1142-1163. ProQuest, https://search.proquest.com/docview/1926450891?accountid=45049, doi:http://dx.doi.org/10.1007/s10766-016-0462-1.

Roberts-Hoffman, Katie, and Pawankumar Hegde. "ARM cortex-a8 vs. intel atom: Architectural and benchmark comparisons." Dallas: the University of Texas at Dallas 5 (2009).